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 SSD40N03
Elektronische Bauelemente 36A, 30V,RDS(ON)21m[ N-Channel Enhancement Mode Power Mos.FET
RoHS Compliant Product
Description
TO-252
The SSD40N03 provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-252 is universally preferred for all commercial-industrial surface mount applications and suited for low voltage applications
such as DC/DC converters.
Features
* Repetitive Avalanche Rated * Dynamic dv/dt Rating
* Simple Drive Requirement * Fast Switching
D
REF. A B C D E F S
G
S
Millimeter Min. Max. 6.40 6.80 5.20 5.50 6.80 7.20 2.20 2.80 2.30 REF. 0.70 0.90 0.60 0.90
REF. G H J K L M R
Millimeter Min. Max. 0.50 0.70 2.20 2.40 0.45 0.55 0 0.15 0.90 1.50 5.40 5.80 0.80 1.20
Absolute Maximum Ratings
Parameter
Drain-Source Voltage Gate-Source Voltage Continuous Drain Current,VGS@10V Continuous Drain Current,VGS@10V Pulsed Drain Current
1
Symbol
VDS VGS ID@TC=25 C ID@TC=100C IDM PD@TC=25 C
o o o
Ratings
30
20 36 25 150 50 0.4
Unit
V V A A A W
W/ C
o o
Total Power Dissipation Linear Derating Factor Operating Junction and Storage Temperature Range
Tj, Tstg
-55~+150
C
Thermal Data
Parameter
Thermal Resistance Junction-case Thermal Resistance Junction-ambient
Symbol Max. Max.
Rthj-c Rthj-a
Ratings
2.5 110
o o
Unit
C /W C /W
http://www.SeCoSGmbH.com/
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 1 of 5
SSD40N03
Elektronische Bauelemente 36A, 30V,RDS(ON)21m[ N-Channel Enhancement Mode Power Mos.FET
Electrical Characteristics( Tj=25 C Unless otherwise specified)
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Gate Threshold Voltage Gate-Source Leakage Current Drain-Source Leakage Current (Tj=25 C ) Drain-Source Leakage Current(Tj=150C) Static Drain-Source On-Resistance
o o
o
Symbol
BVDSS BVDS/ Tj VGS(th) IGSS IDSS
Min.
30
_
Typ.
_
Max.
_
Unit
V V/ C V nA uA uA
o
Test Condition
VGS=0V, ID=250uA Reference to 25 C, ID=1mA VDS=VGS, ID=250uA VGS=20V VDS=30V,VGS=0 VDS=24V,VGS=0 VGS=10V, ID=18A VGS=4.5V, ID=14A
o
0.037
_ _ _ _
_
1.0
_ _ _ _
3.0
100
25 250 21 30
_
_ _
RDS(ON) Qg Qgs Qgd Td(ON) Tr Td(Off) Tf Ciss Coss Crss Gfs
18 24 17 3 10 7.2 60 22.5 10 800 380 133 26
_ _ _ _ _ _ _ _ _ _ _
m [
Total Gate Charge2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time2 Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Forward Transconductance
nC
ID=18A VDS=24V VGS= 5V
_
_ _ _
VDD=15V ID=18A nS VGS=10V RG=3.3[ RD=0.83[
_
_ _
pF
VGS=0V VDS=25V f=1.0MHz
_
_
S
VDS=10V, ID=18A
Source-Drain Diode
Parameter
Forward On Voltage 2 Continuous Source Current(Body Diode)
Pulsed Source Current(Body Diode)
1
Symbol
VSD IS
Min.
_ _
Typ.
_ _ _
Max.
1.3
Unit
V A A
Test Condition
IS=36 A, VGS=0V.Tj=25C VD=VG=0V,VS=1.3 V
o
36
150
ISM
_
Notes: 1.Pulse width limited by safe operating area. 300us, dutycycleO2%. 2. Pulse widthO
http://www.SeCoSGmbH.com/
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 2 of 5
SSD40N03
Elektronische Bauelemente 36A, 30V,RDS(ON)21m[ N-Channel Enhancement Mode Power Mos.FET
Characteristics Curve
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance v.s. Junction Temperature
Fig 5. Maximum Drain Current v.s. Case Temperature
http://www.SeCoSGmbH.com/
Fig 6. Type Power Dissipation
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 3 of 5
SSD40N03
Elektronische Bauelemente 36A, 30V,RDS(ON)21m[ N-Channel Enhancement Mode Power Mos.FET
Fig 7. Maximum Safe Operating Area
Fig 8. Effective Transient Thermal Impedance
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
Fig 11. Forward Characteristics of Reverse Diode
http://www.SeCoSGmbH.com/
Fig 12. Gate Threshold Voltage v.s. Junction Temperature
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 4 of 5
SSD40N03
Elektronische Bauelemente 36A, 30V,RDS(ON)21m[ N-Channel Enhancement Mode Power Mos.FET
Fig 13. Switching Time Circuit
Fig 14. Switching Time Waveform
Fig 15. Gate Charge Circuit
Fig 16. Gate Charge Waveform
http://www.SeCoSGmbH.com/
01-Jun-2002 Rev. A
Any changing of specification will not be informed individual
Page 5 of 5


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